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filterless high efficiency mono 1.4 w class-d audio amplifier ssm2301 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2007 analog devices, inc. all rights reserved. features filterless class-d amplifier with - modulation no sync necessary when using multiple class-d amplifiers from analog devices, inc. 1.4 w into 8 at 5.0 v supply with less than 1% thd + n 85% efficiency at 5.0 v, 1.4 w into 8 speaker greater than 98 db snr (signal-to-noise ratio) single-supply operation from 2.5 v to 5.0 v 20 na ultralow shutdown current short-circuit and thermal protection available in 8-lead, 3 mm 3 mm lfcsp and msop packages pop-and-click suppression built-in resistors reduce board component count fixed and user-adjustable gain configurations applications mobile phones mp3 players portable gaming portable electronics educational toys general description the ssm2301 is a fully integrated, high efficiency, class-d audio amplifier designed to maximize performance for mobile phone applications. the application circuit requires a minimum of external components and operates from a single 2.5 v to 5.0 v supply. it is capable of delivering 1.4 w of continuous output power with less than 1% thd + n driving an 8 load from a 5.0 v supply. the ssm2301 features a high efficiency, low noise modulation scheme that does not require external lc output filters. the modu- lation provides high efficiency even at low output power. the ssm2301 operates with 85% efficiency at 1.4 w into 8 from a 5.0 v supply and has a signal-to-noise ratio (snr) that is greater than 98 db. spread-spectrum modulation is used to provide lower emi-radiated emissions compared with other class-d architectures. the ssm2301 has a micropower shutdown mode with a maximum shutdown current of 30 na. shutdown is enabled by applying a logic low to the sd pin. the device also includes pop-and-click suppression circuitry. this minimizes voltage glitches at the output during turn-on and turn-off, thus reducing audible noise on activation and deactivation. the fully differential input of the ssm2301 provides excellent rejection of common-mode noise on the input. input coupling capacitors can be omitted if the dc input common-mode voltage is approximately v dd /2. the ssm2301 also has excellent rejection of power supply noise, including noise caused by gsm transmission bursts and rf rectification. psrr is typically 63 db at 217 hz. the gain can be set to 6 db or 12 db by utilizing the gain control select pin connected respectively to ground or to vdd. gain can also be adjusted externally by inserting a resistor in series with each input pin. the ssm2301 is specified over th e commercial temperature range (?40c to +85 c). it has built-in thermal shutdown and output short-circuit protection. it is available in both an 8-lead, 3 mm 3 mm lead-frame chip scale package (lfcsp) and an 8-lead msop package. functional block diagram shutdown gain control fet driver modulator 0.1f vdd gnd oscillator pop/click suppression out+ out? bias in+ vbatt 2.5v to 5.0v in? gain 10f 0.01f 1 notes 1 input caps are optional if input dc common-mode voltage is approximately v dd /2. 0.01f 1 sd audio in? audio in+ ssm2301 06163-001 figure 1.
ssm2301 rev. a | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 functional block diagram .............................................................. 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 4 thermal resistance ...................................................................... 4 esd caution .................................................................................. 4 pin configurations and function descriptions ........................... 5 typical performance characteristics ............................................. 6 typical application circuits ......................................................... 10 applications information .............................................................. 12 overview ..................................................................................... 12 gain selection ............................................................................. 12 pop-and-click suppression ...................................................... 12 layout .......................................................................................... 12 input capacitor selection .......................................................... 12 proper power supply decoupling ............................................ 13 outline dimensions ....................................................................... 14 ordering guide .......................................................................... 14 revision history 10/07rev. 0 to rev. a added msop package .......................................................universal changes to features.......................................................................... 1 changes to general description .................................................... 1 changes to table 1............................................................................ 3 deleted evaluation board information section ......................... 14 updated outline dimensions ....................................................... 14 changes to ordering guide .......................................................... 14 1/07revision 0: initial version
ssm2301 rev. a | page 3 of 16 specifications v dd = 5.0 v, t a = 25 o c, r l = 8 + 33 h, unless otherwise noted. table 1. parameter symbol conditions min typ max unit device characteristics output power p o v dd = 5.0 v, r l = 8 , thd = 1% f = 1 khz, 20 khz bw 1.22 w v dd = 5.0 v, r l = 8 , thd = 10% f = 1 khz, 20 khz bw 1.52 w v dd = 3.6 v, r l = 8 , thd = 1% f = 1 khz, 20 khz bw 590 mw v dd = 3.6 v, r l = 8 , thd = 10% f = 1 khz, 20 khz bw 775 mw v dd = 2.5 v, r l = 8 , thd = 1% f = 1 khz, 20 khz bw 275 mw v dd = 2.5 v, r l = 8 , thd = 10% f = 1 khz, 20 khz bw 345 mw efficiency p out = 1.4 w, 8 , v dd = 5.0 v 85 % total harmonic distortion + noise thd + n p o = 1 w into 8 , f = 1 khz, v dd = 5.0 v 0.1 % p o = 0.5 w into 8 , f = 1 khz, v dd = 3.6 v 0.04 % input common-mode voltage range v cm 1.0 v dd ? 1.0 v common-mode rejection ratio cmrr gsm v cm = 2.5 v 100 mv at 217 hz 55 db average switching frequency f sw 1.8 mhz differential output offset voltage v oos g = 6 db; g = 12 db 2.0 mv power supply supply voltage range v dd guaranteed from psrr test 2.5 5.0 v power supply rejection ratio psrr v dd = 2.5 v to 5.0 v, dc input floating/ground 70 85 db psrr gsm v ripple = 100 mv at 217 hz, inputs are ac grounded, c in = 0.01 f, input referred 63 db supply current i sy v in = 0 v, no load, v dd = 5.0 v 4.2 ma v in = 0 v, no load, v dd = 3.6 v 3.5 ma v in = 0 v, no load, v dd = 2.5 v 2.9 ma shutdown current i sd sd = gnd 20 na gain control closed-loop gain a v 0 gain pin = 0 v 6 db a v 1 gain pin = v dd 12 db differential input impedance z in sd = v dd , sd = gnd 150 k 210 k shutdown control input voltage high v ih i sy 1 ma 1.2 v input voltage low v il i sy 300 na 0.5 v turn-on time t wu sd rising edge from gnd to v dd 30 ms turn-off time t sd sd falling edge from v dd to gnd 5 s output impedance z out sd = gnd >100 k noise performance output voltage noise e n v dd = 2.5 v to 5.0 v, f = 20 hz to 20 khz, inputs are ac grounded, sine wave, a v = 6 db, a weighting 35 v signal-to-noise ratio snr p out = 1.4 w, r l = 8 98 db
ssm2301 rev. a | page 4 of 16 absolute maximum ratings absolute maximum ratings apply at 25c, unless otherwise noted. table 2. parameter rating supply voltage 6 v input voltage v dd common-mode input voltage v dd storage temperature range ?65c to +150c operating temperature range ?40c to +85c junction temperature range ?65c to +165c lead temperature (soldering, 60 sec) 300c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 3. thermal resistance package type ja jc unit 8-lead, 3 mm 3 mm lfcsp 62 20.8 c/w 8-lead msop 210 45 c/w esd caution
ssm2301 rev. a | page 5 of 16 pin configurations and function descriptions pin 1 indicator top view (not to scale) ssm2301 sd 1 2 gain 3 in+ 4 in? 7gnd 8out? 6vdd 5out+ 06163-002 figure 2. lfcsp pin configuration sd 1 gain 2 in+ 3 in? 4 out? 8 gnd 7 vdd 6 out+ 5 ssm2301 top view (not to scale) 0 6163-103 figure 3. msop pin configuration table 4. pin function descriptions pin o. nemonic description 1 sd shutdown input. active low digital input. 2 gain gain selection. digital input. 3 in+ noninverting input. 4 in? inverting input. 5 out+ noninverting output. 6 vdd power supply. 7 gnd ground. 8 out? inverting output.
ssm2301 rev. a | page 6 of 16 typical performance characteristics 100 0.01 0.0001 10 output power (w) thd + n (%) 10 1 0.1 0.001 0.01 0.1 1 r l = 8 ? , 15h gain = 6db v dd = 2.5v v dd = 3.6v v dd = 5v 06163-004 figure 4. thd + n vs. output power into 8 , a v = 6 db 100 0.01 0.0001 10 output power (w) thd + n (%) 10 1 0.1 0.001 0.01 0.1 1 r l = 8 ? , 15h gain = 12db v dd = 2.5v v dd = 3.6v v dd = 5v 06163-003 figure 5. thd + n vs. output power into 8 , a v = 12 db 100 0.0001 10 100k frequency (hz) thd + n (%) v dd = 5.0v gain = 6db r l = 8 ? , 15h 10 1 0.1 0.01 0.001 100 1k 10k 1w 0.5w 0.25w 06163-007 figure 6. thd + n vs. frequency, v dd = 5.0 v, a v = 6 db, r l = 8 100 0.0001 10 100k frequency (hz) thd + n (%) v dd = 5.0v gain = 12db r l = 8 ? , 15h 10 1 0.1 0.01 0.001 100 1k 10k 1w 0.5w 0.25w 06163-008 figure 7. thd + n vs. frequency, v dd = 5.0 v, a v = 12 db, r l = 8 100 0.0001 10 100k frequency (hz) thd + n (%) v dd = 3.6v gain = 6db r l = 8 ? , 15h 10 1 0.1 0.01 0.001 100 1k 10k 0.25w 0.5w 0.125w 0 6163-009 figure 8. thd + n vs. frequency, v dd = 3.6 v, a v = 6 db, r l = 8 100 0.0001 10 100k frequency (hz) thd + n (%) v dd = 3.6v gain = 12db r l = 8 ? , 15h 10 1 0.1 0.01 0.001 100 1k 10k 0.25w 0.5w 0.125w 0 6163-010 figure 9. thd + n vs. frequency, v dd = 3.6 v, a v = 12 db, r l = 8
ssm2301 rev. a | page 7 of 16 100 0.0001 10 100k frequency (hz) thd + n (%) v dd = 2.5v gain = 6db r l = 8 ? , 15h 10 1 0.1 0.01 0.001 100 1k 10k 0.25w 0.075w 0.125w 0 6163-011 figure 10. thd + n vs. frequency, v dd = 2.5 v, a v = 6 db, r l = 8 100 0.0001 10 100k frequency (hz) thd + n (%) v dd = 2.5v gain = 12db r l = 8 ? , 15h 10 1 0.1 0.01 0.001 100 1k 10k 0.25w 0.075w 0.125w 0 6163-012 figure 11. thd + n vs. frequency, v dd = 2.5 v, a v = 12 db, r l = 8 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 2.5 5.5 5.0 4.5 4.0 3.5 3.0 supply voltage (v) supply current (ma) 0 6163-019 figure 12. supply current vs. supply voltage, no load 12 10 8 6 4 2 0 00 0.7 0.6 0.5 0.3 0.1 0.4 0.2 shutdown voltage (v) shutdown current (a) . 8 v dd = 3.6v v dd = 2.5v 0 6163-020 v dd = 5.0v figure 13. shutdown current vs. shutdown voltage 1.6 0 2.5 5.0 supply voltage (v) output power (w) 10% 1% f = 1khz gain = 6db r l = 8 ? 1.4 1.2 1.0 0.8 0.6 0.4 0.2 3.0 3.5 4.0 4.5 0 6163-021 figure 14. maximum output power vs. supply voltage, a v = 6 db, r l = 8 , 1.8 1.6 0 2.5 5.0 supply voltage (v) output power (w) 10% 1% f = 1khz gain = 12db r l = 8 ? 1.4 1.2 1.0 0.8 0.6 0.4 0.2 3.0 3.5 4.0 4.5 0 6163-022 figure 15. maximum output power vs. supply voltage, a v = 12 db, r l = 8
ssm2301 rev. a | page 8 of 16 100 0 10 20 30 40 50 60 70 80 90 01 . 4 output power (w) efficiency (%) r l = 8 ? , 15h v dd = 2.5v v dd = 3.6v v dd = 5.0v 0.2 0.4 0.6 0.8 1.2 1.0 0 6163-025 figure 16. efficiency vs. output power into 8 0.20 0 0.02 0.04 0.06 0.08 0.10 0.12 0.14 0.16 0.18 00 . 8 400 350 300 250 200 150 100 50 0 0 0.10.20.30.40.50.60.70.80.91.01.11.21.31.41.5 output power (w) supply current (ma) r l = 8 ? , 15h v dd = 2.5v v dd = 3.6v v dd = 5.0v 0 6163-031 output power (w) power dissipation (w) v dd = 3.6v r l = 8 ? , 15h 0.2 0.1 0.3 0.4 0.5 0.6 0.7 0 6163-050 figure 17. power dissipation vs. output power into 8 at v dd = 3.6 v 0.30 0.25 0.20 0.15 0.10 0.05 0 01 . 5 output power (w) power dissipation (w) v dd = 5.0v r l = 8 ? , 15h 0.3 0.1 0.5 0.7 0.9 1.1 1.3 1.4 0.20.40.60.81.01.2 0 6163-051 figure 18. power dissipation vs. output power into 8 at v dd = 5.0 v figure 19. supply current vs. output power into 8 , one channel 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 10 100 1k 10k 100k frequency (hz) psrr (db) 0 6163-033 figure 20. power supply reje ction ratio vs. frequency 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 10 100 1k 10k 100k frequency (hz) cmrr (db) r l = 8 ? , 33h gain = 6db 0 6163-034 figure 21. common-mode reje ction ratio vs. frequency
ssm2301 rev. a | page 9 of 16 7 ?2 ?10 90 time (ms) voltage (v) 6 5 4 3 2 1 0 ?1 ?5 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 output sd input 0 6163-035 figure 22. turn-on response 7 ?2 ?20 180 time (ms) voltage (v) 6 5 4 3 2 1 0 ?1 0 20 40 60 80 100 120 140 160 sd input output 0 6163-036 figure 23. turn-off response
ssm2301 rev. a | page 10 of 16 typical application circuits shutdown gain control fet driver modulator 0.1f vdd gnd oscillator pop/click suppression out+ out? bias in+ vbatt 2.5v to 5.0v in? gain 10f 0.01f 1 notes 1 input capacitors are optional if input dc common-mode voltage is approximately v dd /2. 0.01f 1 sd audio in? audio in+ ssm2301 v dd 0 6163-037 figure 24. differential input configuration, gain = 12 db shutdown gain control fet driver modulator 0.1f vdd gnd oscillator pop/click suppression out+ out? bias in+ vbatt 2.4v to 5.0v in? gain 10f 0.01f 0.01f sd audio in ssm2301 06163-038 figure 25. single-ended input configuration, gain = 6 db shutdown gain control fet driver modulator 0.1f vdd gnd oscillator pop/click suppression out+ out? bias in+ vbatt 2.4v to 5.0v in? gain 10f 0.01f 1 notes 1 input capacitors are optional if input dc common-mode voltage is approximately v dd /2. 0.01f 1 sd audio in? audio in+ ssm2301 v dd external gain settings = 20 log[4/(1 + r/150k ? )] r r 06163-039 figure 26. differential input configuration, user-adjustable gain
ssm2301 rev. a | page 11 of 16 shutdown gain control fet driver modulator 0.1f vdd gnd oscillator pop/click suppression out+ out? bias in+ vbatt 2.4v to 5.0v in? gain 10f 0.01f 0.01f sd audio in ssm2301 v dd external gain settings = 20 log[4/(1 + r/150k ? )] r r 06163-040 figure 27. single-ended input conf iguration, user-adjustable gain shutdown gain control fet driver modulator 0.1f vdd gnd oscillator pop/click suppression out+ out? bias in+ vbatt 2.4v to 5.0v in? gain 10f 0.01f 1 notes 1 input capacitors are optional if input dc common-mode voltage is approximately v dd /2. 0.01f 1 sd audio in? audio in+ ssm2301 external gain settings = 20 log[2/(1 + r/150k ? )] r r 06163-041 figure 28. differential input configuration, user-adjustable gain shutdown gain control fet driver modulator 0.1f vdd gnd oscillator pop/click suppression out+ out? bias in+ vbatt 2.4v to 5.0v in? gain 10f 0.01f 0.01f sd audio in ssm2301 external gain settings = 20 log[2/(1 + r/150k ? )] r r 06163-042 figure 29. single-ended input conf iguration, user-adjustable gain
ssm2301 rev. a | page 12 of 16 applications information overview the ssm2301 mono class-d audio amplifier features a filterless modulation scheme that greatly reduces external component count, conserving board space and, thus, reducing system cost. the ssm2301 does not require an output filter but, instead, relies on the inherent inductance of the speaker coil and the natural filtering of the speaker and human ear to fully recover the audio component of the square-wave output. while most class-d ampli- fiers use some variation of pulse-width modulation (pwm), the ssm2301 uses a - modulation to determine the switching pattern of the output devices. this provides a number of important benefits. - modulators do not produce a sharp peak with many harmonics in the am frequency band, as pulse-width modulators often do. - modulation reduces the amplitude of spectral components at high frequencies, thereby reducing emi emission that might otherwise be radiated by speakers and long cable traces. the ssm2301 also offers protection circuitry for output short- circuit and high temperature conditions. when the fault-inducing condition is removed, the ssm2301 automatically recovers without the need for a hard reset. gain selection pulling the gain pin of the ssm2301 high sets the gain of the speaker amplifier to 12 db; pulling it low sets the gain of the speaker amplifier to 6 db. it is possible to adjust the ssm2301 gain by using external resistors at the input. to set a gain lower than 12 db, see figure 26 for differential input configuration and figure 27 for single-ended configuration. for external gain configuration from a fixed 12 db gain, use the following formula: external gain settings = 20 log[4/(1 + r /150 k)] to set a gain lower than 6 db, see figure 28 for differential input configuration and figure 29 for single-ended configuration. for external gain configuration from a fixed 6 db gain, use the following formula: external gain settings = 20 log[2/(1 + r /150 k)] pop-and-click suppression voltage transients at the output of audio amplifiers may occur when shutdown is activated or deactivated. voltage transients as low as 10 mv can be heard as an audio pop in the speaker. clicks and pops can also be classified as undesirable audible transients generated by the amplifier system and, therefore, as not coming from the system input signal. such transients may be generated when the amplifier system changes its operating mode. for example, the following can be sources of audible transients: system power-up/power-down, mute/unmute, input source change, and sample rate change. the ssm2301 has a pop- and-click suppression architecture that reduces these output transients, resulting in noiseless activation and deactivation. layout as output power continues to increase, care must be taken to lay out pcb traces and wires properly between the amplifier, load, and power supply. a good practice is to use short, wide pcb tracks to decrease voltage drops and minimize inductance. make track widths at least 200 mil for every inch of track length for lowest dcr, and use 1 oz or 2 oz of copper pcb traces to further reduce ir drops and inductance. poor layout increases voltage drops, consequently affecting efficiency. use large traces for the power supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance. proper grounding guidelines help improve audio performance, minimize crosstalk between channels, and prevent switching noise from coupling into the audio signal. to maintain high output swing and high peak output power, pcb traces that connect the output pins to the load and supply pins should be as wide as possible to maintain the minimum trace resistances. it is also recommended that a large-area ground plane be used for minimum impedances. good pcb layouts also isolate critical analog paths from sources of high interference. high frequency circuits (analog and digital) should be separated from low frequency circuits. properly designed multilayer printed circuit boards can reduce emi emission and increase immunity to the rf field by a factor of 10 or more compared with double-sided boards. a multilayer board allows a complete layer to be used for the ground plane, whereas the ground plane side of a double- side board is often disrupted with signal crossover. if the system has separate analog and digital ground and power planes, the analog ground plane should be underneath the analog power plane, and, similarly, the digital ground plane should be underneath the digital power plane. there should be no overlap between analog and digital ground planes or analog and digital power planes. input capacitor selection the ssm2301 does not require input coupling capacitors if the input signal is biased from 1.0 v to v dd ? 1.0 v. input capacitors are required if the input signal is not biased within this recom- mended input dc common-mode voltage range, if high-pass filtering is needed (see figure 24) or if using a single-ended source (see figure 25). if high-pass filtering is needed at the input, the input capacitor, along with the input resistor of the ssm2301, forms a high-pass filter whose corner frequency is determined by the following equation: f c = 1/(2 r in c in ) the input capacitor can have very important effects on the circuit performance. not using input capacitors degrades the output offset of the amplifier as well as the psrr performance.
ssm2301 rev. a | page 13 of 16 proper power supply decoupling to ensure high efficiency, low total harmonic distortion (thd), and high psrr, proper power supply decoupling is necessary. noise transients on the power supply lines are short-duration voltage spikes. although the actual switching frequency can range from 10 khz to 100 khz, these spikes can contain frequency components that extend into the hundreds of megahertz. the power supply input needs to be decoupled with a good quality low esl and low esr capacitor, usually around 4.7 f. this capacitor bypasses low frequency noises to the ground plane. for high frequency transients noises, use a 0.1 f capacitor placed as close as possible to the vdd pin of the device. placing the decoupling capacitor as close as possible to the ssm2301 helps maintain efficient performance.
ssm2301 rev. a | page 14 of 16 outline dimensions 1 0.50 bsc 0.60 max pin 1 indicato r 1.50 ref 0.50 0.40 0.30 2.75 bsc sq top view 12 max 0.70 max 0.65 typ seating plane pin 1 indicator 0.90 max 0.85 nom 0.30 0.23 0.18 0.05 max 0.01 nom 0.20 ref 1.89 1.74 1.59 4 1.60 1.45 1.30 3.00 bsc sq 5 8 figure 30. 8-lead lead frame chip scale package [lfcsp_vd] 3 mm 3 mm body, very thin, dual lead (cp-8-2) dimensions shown in millimeters compliant to jedec standards mo-187-aa 0.80 0.60 0.40 8 0 4 8 1 5 pin 1 0.65 bsc seating plane 0.38 0.22 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.08 3.20 3.00 2.80 5.15 4.90 4.65 0.15 0.00 0.95 0.85 0.75 figure 3 1 . 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters ordering guide model temperature range package description package option branding SSM2301CPZ-r2 1 ?40c to +85c 8-lead lead frame chip scale package [lfcsp_vd] cp-8-2 a1c SSM2301CPZ-reel 1 ?40c to +85c 8-lead lead frame chip scale package [lfcsp_vd] cp-8-2 a1c SSM2301CPZ-reel7 1 ?40c to +85c 8-lead lead frame chip scale package [lfcsp_vd] cp-8-2 a1c ssm2301rmz-r2 1 ?40c to +85c 8-lead mini small outline package [msop] rm-8 a1c ssm2301rmz-reel 1 ?40c to +85c 8-lead mini small outline package [msop] rm-8 a1c ssm2301rmz-reel7 1 ?40c to +85c 8-lead mini small outline package [msop] rm-8 a1c ssm2301-evalz 1 evaluation board wi th lfcsp model 1 z = rohs compliant part.
ssm2301 rev. a | page 15 of 16 notes
ssm2301 rev. a | page 16 of 16 notes ?2007 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d06163-0-10/07(a)

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